Job Description
Our Client:
Our client's focus is on chip-scale integrated photonics solutions using their optical interposer technology. They are actively looking for a Principal Assembly Engineer to join their team in Singapore.
The Responsibilities:
* Design and develop next generation optical interposers leveraging silicon/TSV and advanced 2/5/3D IC packaging solutions
* Define package stack-up, routing and PDN requirements for new products
* Work with external vendors to develop wafer processes and integration for 2.5D/3D heterogeneous integration
* Manage wafer lot handling and define metrology inspection process control requirements
* Analyze process data and provide technical feedback to drive product development
* Manage critical technical deliverables, timeline and provide regular updates to management and stakeholders
* Perform analysis on packaging process specs performance, yield, manufacturing cost, and cycle-time; and contribute to planning and execution of essential improvement programs
* Provides documentation & regular technical reporting, and technical support and coordination with the Company NPI teams to fulfil the Company Technology and Product Development programs
The Requirements:
* Serve as a technical team or task leader, ready to quickly learn new techniques with a passionate R&D mindset
* Interfaces with supplier and internal staff concerning quality and assure that effective corrective action or improvement is implemented
* On-time completion of packaging-optics design and process development
* Monitoring and Improvement of packaging process capabilities
* Product and Process capability maintenance/ improvement leading to yield enhancement, including data analysis
* Development of ROE/TOE/TROE processes and product prototypes to support the programs championed by the new product development agenda in the company
* Delivery of HIPP assembly process capability items and assembled prototypes and production samples as per NPD program requirements
* Electronic packaging knowledge, with knowledge of TSV processing a must. Photonic packaging knowledge is a plus
* Hand-on experience with die-assembly tool, flip-chip bonder, wire bonder, and CAD drawing is strongly recommended
* Understanding the packaging of semiconductor wafers is a plus
* Knowledge of up-to-date production and automation equipment, processes, designs, and functions
Disclaimer: The Company complies with the Tripartite Guidelines on Fair Employment Practices (TGFEP), including the prevailing guidelines on recruitment. All qualified applicants will be considered for the position regardless of their age, race, religion, nationality, marital status, or family responsibilities. A more detailed discussion of the TGFEP is available on the Tripartite Alliance for Fair and Progressive Employment Practices (TAFEP) website at https://www.tal.sg/tafep.